Security-Aware Digital Phased-Array Design Workshop at NSWC, Crane

The ASPC Group, in collaboration with Dr. Nghi Tran, and Dr. Hong Liang (TSU) conducted a 2-day workshop on security-aware digital phased-array design for NSWC, Crane, IN, engineers. Viduneth Ariyarathna, Nilan Udayanga, Sravan Pulipati and Suresh Madhishetty were the resource personsĀ in the workshop. We thank the Office of Naval Research (ONR) for financial support.

About arjuna

I am an Assistant Professor at the Department of Electrical and Computer Engineering.
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